NVIDIA-Certified Associate: Generative AI LLMs (NCA-GENL) practice questions

In a transformer encoder, what is the primary purpose of the multi-head attention mechanism compared to single-head attention?

• AIt allows the model to attend to information from different representation subspaces at different positions simultaneously.check_circle Correct
• BIt reduces the total number of parameters by splitting the attention matrix into independent segments.
• CIt replaces positional encoding by encoding token order directly through each attention head.
• DIt applies a recurrent connection across heads so that the output of one head is fed as input to the next head sequentially.

Why A is correct: This is the defining benefit: each head learns a distinct linear projection of queries, keys, and values, enabling the model to capture different types of relationships (syntactic, semantic, coreference) in parallel across the sequence.

Why B is wrong: Tempting because 'splitting' sounds like compression, but multi-head attention does not reduce parameters - it uses separate learned projection matrices for each head, which typically keeps or increases the parameter count relative to a single wide attention layer.

Why C is wrong: Tempting because attention heads do process position-sensitive information, but positional encoding is a separate, additive signal injected into the embeddings before attention is computed - attention heads do not replace it.

Why D is wrong: Tempting for candidates who conflate multi-head attention with sequential processing, but the heads in multi-head attention operate in parallel and independently; their outputs are concatenated, not chained recurrently.

A team is training a convolutional neural network (CNN) on a dataset of greyscale medical images. Each image is 256x256 pixels, stored in channels-last (NHWC) format. Which tensor shape correctly represents a single training batch of 32 images when fed into the first convolutional layer?

• A(32, 3, 256, 256) - batch size, channels, height, width
• B(32, 256, 256, 1) - batch size, height, width, channelscheck_circle Correct
• C(32, 256, 256) - batch size, height, width only
• D(1, 32, 256, 256) - channels, batch size, height, width

Why A is wrong: Tempting because NCHW format is valid in some frameworks such as PyTorch, and 3 is the channel count for RGB images. However, greyscale images have 1 channel, not 3, making this shape doubly wrong for this task.

Why B is correct: A greyscale image has exactly one channel. The standard NHWC (batch, height, width, channels) format places the channel count last, giving (32, 256, 256, 1). This matches the expected input shape for most deep learning frameworks in channels-last mode.

Why C is wrong: Omitting the channel dimension is a common shorthand in data pre-processing scripts, but a CNN layer requires an explicit channel dimension. Passing a 3-D tensor without a channel axis causes a shape mismatch error at the convolution operation.

Why D is wrong: The channel count of 1 is numerically correct for greyscale, but placing it in the first axis and the batch size in the second axis inverts the standard batch-first convention, which causes incorrect layer behaviour and gradient computation.

A PyTorch training pipeline loads a large image dataset. Profiling shows the GPU sits idle for several hundred milliseconds between batches. The DataLoader currently uses num_workers=0. Which configuration change will most directly reduce the inter-batch GPU idle time?

• AIncrease the batch size substantially so each GPU kernel runs longer, amortising the fixed per-batch data transfer overhead across more samples per step.
• BReplace the default collate function with a custom one that stacks tensors directly on the GPU, removing the explicit host-to-device copy step from inside the training loop.
• CMove the entire dataset into GPU VRAM at the start of training using a pre-loaded TensorDataset so that each batch requires no host-to-device transfer during the loop.
• DSet num_workers to a value greater than zero and enable pin_memory=True so that background worker processes prefetch batches while the GPU trains, and pinned memory enables faster asynchronous DMA transfers.check_circle Correct

Why A is wrong: A larger batch size reduces the number of host-to-device transfers per epoch but does not introduce prefetching. The root cause is that data loading is sequential and blocking, and increasing batch size does not change that. It may also cause out-of-memory errors or destabilise training.

Why B is wrong: DataLoader workers run in forked processes that cannot share CUDA contexts in the standard configuration; attempting to create GPU tensors inside a worker raises a RuntimeError. Tensors must be transferred to the GPU inside the main training loop, not during collation in the worker process.

Why C is wrong: Pre-loading a large image dataset into GPU VRAM is not feasible; VRAM capacity is far smaller than typical dataset sizes and the approach fails with an out-of-memory error. It also prevents standard CPU-side augmentation pipelines from running, limiting training data diversity.

Why D is correct: With num_workers=0, the main process blocks on each batch load before resuming the training loop, serialising CPU work and GPU computation. Setting num_workers greater than zero spawns workers that prepare the next batch in parallel. pin_memory=True allocates output tensors in page-locked host memory, enabling the CUDA DMA engine to transfer them asynchronously with higher bandwidth, further overlapping data preparation with GPU execution.