During a distributed training run, a GPU must send a gradient tensor that already resides in its device memory to a remote GPU across the cluster fabric. An engineer wants the data to travel from GPU memory directly to the network adapter without first being staged into host CPU memory. Which NVIDIA technology provides this data path?
- AUnified Virtual Addressing, which gives host and device a single address space so pointers can be passed between CPU and GPU code without translation.
- BPinned host memory allocation, which locks pages so the NIC can DMA from them without the operating system paging them out mid-transfer.
- CGPUDirect RDMA, which lets a network adapter read and write GPU device memory directly across the PCIe bus, bypassing a host-memory bounce buffer. Correct
- DNVLink peer-to-peer access, which lets two GPUs in the same server read each other's memory without involving the CPU.
Why A is wrong: Tempting because UVA also concerns CPU and GPU memory, but it only unifies the address space for programming convenience and does not let a NIC move data directly to or from GPU memory over the network.
Why B is wrong: Tempting because pinning is genuinely required for efficient DMA, but it operates on host memory and therefore still places the gradient in a CPU bounce buffer rather than sending it straight from GPU memory.
Why C is correct: Correct: GPUDirect RDMA exposes GPU memory to the NIC so the adapter performs remote direct memory access straight to and from device memory, removing the host-memory staging copy on the network path.
Why D is wrong: Tempting because it also avoids the CPU, but NVLink peer-to-peer is an intra-node interconnect between GPUs in one chassis and does not carry traffic across the cluster fabric to a remote node.